\doxysection{PLL1\+\_\+\+Clocks\+Type\+Def Struct Reference}
\hypertarget{struct_p_l_l1___clocks_type_def}{}\label{struct_p_l_l1___clocks_type_def}\index{PLL1\_ClocksTypeDef@{PLL1\_ClocksTypeDef}}


RCC PLL1 Clocks structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+rcc\+\_\+ex.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{struct_p_l_l1___clocks_type_def_afcfbe4bca92d6cc1f081f7dccb5f2176}\label{struct_p_l_l1___clocks_type_def_afcfbe4bca92d6cc1f081f7dccb5f2176} 
uint32\+\_\+t {\bfseries PLL1\+\_\+\+P\+\_\+\+Frequency}
\item 
\Hypertarget{struct_p_l_l1___clocks_type_def_a9cfee49e27011897b377514a77370bfb}\label{struct_p_l_l1___clocks_type_def_a9cfee49e27011897b377514a77370bfb} 
uint32\+\_\+t {\bfseries PLL1\+\_\+\+Q\+\_\+\+Frequency}
\item 
\Hypertarget{struct_p_l_l1___clocks_type_def_a3281db7816279628cf4a3ca0f837a54f}\label{struct_p_l_l1___clocks_type_def_a3281db7816279628cf4a3ca0f837a54f} 
uint32\+\_\+t {\bfseries PLL1\+\_\+\+R\+\_\+\+Frequency}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
RCC PLL1 Clocks structure definition. 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__rcc__ex_8h}{stm32h7xx\+\_\+hal\+\_\+rcc\+\_\+ex.\+h}}\end{DoxyCompactItemize}
